<libmaple/nvic.h>
¶
Nested Vector Interrupt Controller (NVIC) support.
The same API is used on all targets, but the available interrupts are target-dependent. To manage this, each target series defines an nvic_irq_num enumerator for each available interrupt.
Contents
nvic_irq_num
¶
This target-dependent enum is used to identify an interrupt vector
number. Interrupts which are common across series have the same token
(though not necessarily the same value) for their nvic_irq_num
s.
The available values on each supported target series are as follows.
STM32F1 Targets¶
-
enum
stm32f1::
nvic_irq_num
¶ STM32F1 interrupt vector table interrupt numbers.
- See
- <libmaple/scb.h>
Values:
-
NVIC_NMI
= -14¶ Non-maskable interrupt.
-
NVIC_HARDFAULT
= -13¶ Hard fault (all class of fault)
-
NVIC_MEM_MANAGE
= -12¶ Memory management.
-
NVIC_BUS_FAULT
= -11¶ Bus fault: prefetch fault, memory access fault.
-
NVIC_USAGE_FAULT
= -10¶ Usage fault: Undefined instruction or illegal state.
-
NVIC_SVC
= -5¶ System service call via SWI insruction.
-
NVIC_DEBUG_MON
= -4¶ Debug monitor.
-
NVIC_PEND_SVC
= -2¶ Pendable request for system service.
-
NVIC_SYSTICK
= -1¶ System tick timer.
-
NVIC_WWDG
= 0¶ Window watchdog interrupt.
-
NVIC_PVD
= 1¶ PVD through EXTI line detection.
-
NVIC_TAMPER
= 2¶ Tamper.
-
NVIC_RTC
= 3¶ Real-time clock.
-
NVIC_FLASH
= 4¶ Flash.
-
NVIC_RCC
= 5¶ Reset and clock control.
-
NVIC_EXTI0
= 6¶ EXTI line 0.
-
NVIC_EXTI1
= 7¶ EXTI line 1.
-
NVIC_EXTI2
= 8¶ EXTI line 2.
-
NVIC_EXTI3
= 9¶ EXTI line 3.
-
NVIC_EXTI4
= 10¶ EXTI line 4.
-
NVIC_DMA_CH1
= 11¶ DMA1 channel 1.
-
NVIC_DMA_CH2
= 12¶ DMA1 channel 2.
-
NVIC_DMA_CH3
= 13¶ DMA1 channel 3.
-
NVIC_DMA_CH4
= 14¶ DMA1 channel 4.
-
NVIC_DMA_CH5
= 15¶ DMA1 channel 5.
-
NVIC_DMA_CH6
= 16¶ DMA1 channel 6.
-
NVIC_DMA_CH7
= 17¶ DMA1 channel 7.
-
NVIC_ADC_1_2
= 18¶ ADC1 and ADC2.
-
NVIC_USB_HP_CAN_TX
= 19¶ USB high priority or CAN TX.
-
NVIC_USB_LP_CAN_RX0
= 20¶ USB low priority or CAN RX0.
-
NVIC_CAN_RX1
= 21¶ CAN RX1.
-
NVIC_CAN_SCE
= 22¶ CAN SCE.
-
NVIC_EXTI_9_5
= 23¶ EXTI line [9:5].
-
NVIC_TIMER1_BRK_TIMER9
= 24¶ Timer 1 break, Timer 9.
-
NVIC_TIMER1_UP_TIMER10
= 25¶ Timer 1 update, Timer 10.
-
NVIC_TIMER1_TRG_COM_TIMER11
= 26¶ Timer 1 trigger and commutation, Timer 11.
-
NVIC_TIMER1_CC
= 27¶ Timer 1 capture/compare.
-
NVIC_TIMER2
= 28¶ Timer 2.
-
NVIC_TIMER3
= 29¶ Timer 3.
-
NVIC_TIMER4
= 30¶ Timer 4.
-
NVIC_I2C1_EV
= 31¶ I2C1 event.
-
NVIC_I2C1_ER
= 32¶ I2C1 error.
-
NVIC_I2C2_EV
= 33¶ I2C2 event.
-
NVIC_I2C2_ER
= 34¶ I2C2 error.
-
NVIC_SPI1
= 35¶ SPI1.
-
NVIC_SPI2
= 36¶ SPI2.
-
NVIC_USART1
= 37¶ USART1.
-
NVIC_USART2
= 38¶ USART2.
-
NVIC_USART3
= 39¶ USART3.
-
NVIC_EXTI_15_10
= 40¶ EXTI line [15:10].
-
NVIC_RTCALARM
= 41¶ RTC alarm through EXTI line.
-
NVIC_USBWAKEUP
= 42¶ USB wakeup from suspend through EXTI line.
-
NVIC_TIMER8_BRK_TIMER12
= 43¶ Timer 8 break, timer 12.
-
NVIC_TIMER8_UP_TIMER13
= 44¶ Timer 8 update, timer 13.
-
NVIC_TIMER8_TRG_COM_TIMER14
= 45¶ Timer 8 trigger and commutation, Timer 14.
-
NVIC_TIMER8_CC
= 46¶ Timer 8 capture/compare.
-
NVIC_ADC3
= 47¶ ADC3.
-
NVIC_FSMC
= 48¶ FSMC.
-
NVIC_SDIO
= 49¶ SDIO.
-
NVIC_TIMER5
= 50¶ Timer 5.
-
NVIC_SPI3
= 51¶ SPI3.
-
NVIC_UART4
= 52¶ UART4.
-
NVIC_UART5
= 53¶ UART5.
-
NVIC_TIMER6
= 54¶ Timer 6.
-
NVIC_TIMER7
= 55¶ Timer 7.
-
NVIC_DMA2_CH1
= 56¶ DMA2 channel 1.
-
NVIC_DMA2_CH2
= 57¶ DMA2 channel 2.
-
NVIC_DMA2_CH3
= 58¶ DMA2 channel 3.
-
NVIC_DMA2_CH_4_5
= 59¶ DMA2 channels 4 and 5.
-
NVIC_TIMER1_BRK
= NVIC_TIMER1_BRK_TIMER9¶ (Deprecated) Timer 1 break
For backwards compatibility only. Use NVIC_TIMER1_BRK_TIMER9 instead.
-
NVIC_TIMER1_UP
= NVIC_TIMER1_UP_TIMER10¶ (Deprecated) Timer 1 update.
For backwards compatibility only. Use NVIC_TIMER1_UP_TIMER10 instead.
-
NVIC_TIMER1_TRG_COM
= NVIC_TIMER1_TRG_COM_TIMER11¶ (deprecated) Timer 1 trigger and commutation.
For backwards compatibility only. Use NVIC_TIMER1_TRG_COM_TIMER11 instead.
-
NVIC_TIMER8_BRK
= NVIC_TIMER8_BRK_TIMER12¶ (deprecated) Timer 8 break
For backwards compatibility only. Use NVIC_TIMER8_BRK_TIMER12 instead.
-
NVIC_TIMER8_UP
= NVIC_TIMER8_UP_TIMER13¶ (deprecated) Timer 8 update For backwards compatibility only.
Use NVIC_TIMER8_UP_TIMER13 instead.
-
NVIC_TIMER8_TRG_COM
= NVIC_TIMER8_TRG_COM_TIMER14¶ (deprecated) Timer 8 trigger and commutation.
For backwards compatibility only. Use NVIC_TIMER8_TRG_COM_TIMER14 instead.
STM32F2-F4 Targets¶
-
enum
stm32f2_f4::
nvic_irq_num
¶ STM32F2-F4 interrupt vector table interrupt numbers.
Values:
-
NVIC_NMI
= -14¶ Non-maskable interrupt.
-
NVIC_HARDFAULT
= -13¶ Hard fault (all class of fault)
-
NVIC_MEM_MANAGE
= -12¶ Memory management.
-
NVIC_BUS_FAULT
= -11¶ Bus fault: prefetch fault, memory access fault.
-
NVIC_USAGE_FAULT
= -10¶ Usage fault: Undefined instruction or illegal state.
-
NVIC_SVC
= -5¶ System service call via SWI instruction.
-
NVIC_DEBUG_MON
= -4¶ Debug monitor.
-
NVIC_PEND_SVC
= -2¶ Pendable request for system service.
-
NVIC_SYSTICK
= -1¶ System tick timer.
-
NVIC_WWDG
= 0¶ Window watchdog interrupt.
-
NVIC_PVD
= 1¶ PVD through EXTI line detection.
-
NVIC_TAMP_STAMP
= 2¶ Tamper and TimeStamp.
-
NVIC_RTC_WKUP
= 3¶ Real-time clock wakeup.
-
NVIC_FLASH
= 4¶ Flash.
-
NVIC_RCC
= 5¶ Reset and clock control.
-
NVIC_EXTI0
= 6¶ EXTI line 0.
-
NVIC_EXTI1
= 7¶ EXTI line 1.
-
NVIC_EXTI2
= 8¶ EXTI line 2.
-
NVIC_EXTI3
= 9¶ EXTI line 3.
-
NVIC_EXTI4
= 10¶ EXTI line 4.
-
NVIC_DMA1_STREAM0
= 11¶ DMA1 stream 0.
-
NVIC_DMA1_STREAM1
= 12¶ DMA1 stream 1.
-
NVIC_DMA1_STREAM2
= 13¶ DMA1 stream 2.
-
NVIC_DMA1_STREAM3
= 14¶ DMA1 stream 3.
-
NVIC_DMA1_STREAM4
= 15¶ DMA1 stream 4.
-
NVIC_DMA1_STREAM5
= 16¶ DMA1 stream 5.
-
NVIC_DMA1_STREAM6
= 17¶ DMA1 stream 6.
-
NVIC_ADC
= 18¶ ADC.
-
NVIC_CAN1_TX
= 19¶ CAN1 TX.
-
NVIC_CAN1_RX0
= 20¶ CAN1 RX0.
-
NVIC_CAN1_RX1
= 21¶ CAN1 RX1.
-
NVIC_CAN1_SCE
= 22¶ CAN1 SCE.
-
NVIC_EXTI_9_5
= 23¶ EXTI lines [9:5].
-
NVIC_TIMER1_BRK_TIMER9
= 24¶ Timer 1 break and timer 9.
-
NVIC_TIMER1_UP_TIMER10
= 25¶ Timer 1 update and timer 10.
-
NVIC_TIMER1_TRG_COM_TIMER11
= 26¶ Timer 1 trigger and commutation and timer 11.
-
NVIC_TIMER1_CC
= 27¶ Timer 1 capture and compare.
-
NVIC_TIMER2
= 28¶ Timer 2.
-
NVIC_TIMER3
= 29¶ Timer 3.
-
NVIC_TIMER4
= 30¶ Timer 4.
-
NVIC_I2C1_EV
= 31¶ I2C1 event.
-
NVIC_I2C1_ER
= 32¶ I2C2 error.
-
NVIC_I2C2_EV
= 33¶ I2C2 event.
-
NVIC_I2C2_ER
= 34¶ I2C2 error.
-
NVIC_SPI1
= 35¶ SPI1.
-
NVIC_SPI2
= 36¶ SPI2.
-
NVIC_USART1
= 37¶ USART1.
-
NVIC_USART2
= 38¶ USART2.
-
NVIC_USART3
= 39¶ USART3.
-
NVIC_EXTI_15_10
= 40¶ EXTI lines [15:10].
-
NVIC_RTCALARM
= 41¶ RTC alarms A and B through EXTI.
-
NVIC_OTG_FS_WKUP
= 42¶ USB on-the-go full-speed wakeup through EXTI.
-
NVIC_TIMER8_BRK_TIMER12
= 43¶ Timer 8 break and timer 12.
-
NVIC_TIMER8_UP_TIMER13
= 44¶ Timer 8 update and timer 13.
-
NVIC_TIMER8_TRG_COM_TIMER14
= 45¶ Timer 8 trigger and commutation and timer 14.
-
NVIC_TIMER8_CC
= 46¶ Timer 8 capture and compare.
-
NVIC_DMA1_STREAM7
= 47¶ DMA1 stream 7.
-
NVIC_FSMC
= 48¶ FSMC.
-
NVIC_SDIO
= 49¶ SDIO.
-
NVIC_TIMER5
= 50¶ Timer 5.
-
NVIC_SPI3
= 51¶ SPI3.
-
NVIC_UART4
= 52¶ UART4.
-
NVIC_UART5
= 53¶ UART5.
-
NVIC_TIMER6_DAC
= 54¶ Timer 6 and DAC underrun.
-
NVIC_TIMER7
= 55¶ Timer 7.
-
NVIC_DMA2_STREAM0
= 56¶ DMA2 stream 0.
-
NVIC_DMA2_STREAM1
= 57¶ DMA2 stream 1.
-
NVIC_DMA2_STREAM2
= 58¶ DMA2 stream 2.
-
NVIC_DMA2_STREAM3
= 59¶ DMA2 stream 3.
-
NVIC_DMA2_STREAM4
= 60¶ DMA2 stream 4.
-
NVIC_ETH
= 61¶ Ethernet.
-
NVIC_ETH_WKUP
= 62¶ Ethernet wakeup through EXTI.
-
NVIC_CAN2_TX
= 63¶ CAN2 TX.
-
NVIC_CAN2_RX0
= 64¶ CAN2 RX0.
-
NVIC_CAN2_RX1
= 65¶ CAN2 RX1.
-
NVIC_CAN2_SCE
= 66¶ CAN2 SCE.
-
NVIC_OTG_FS
= 67¶ USB on-the-go full-speed.
-
NVIC_DMA2_STREAM5
= 68¶ DMA2 stream 5.
-
NVIC_DMA2_STREAM6
= 69¶ DMA2 stream 6.
-
NVIC_DMA2_STREAM7
= 70¶ DMA2 stream 7.
-
NVIC_USART6
= 71¶ USART6.
-
NVIC_I2C3_EV
= 72¶ I2C3 event.
-
NVIC_I2C3_ER
= 73¶ I2C3 error.
-
NVIC_OTG_HS_EP1_OUT
= 74¶ USB on-the-go high-speed endpoint 1 OUT.
-
NVIC_OTG_HS_EP1_IN
= 75¶ USB on-the-go high-speed endpoint 1 IN.
-
NVIC_OTG_HS_WKUP
= 76¶ USB on-the-go high-speed wakeup through EXTI.
-
NVIC_OTG_HS
= 77¶ USB on-the-go high-speed.
-
NVIC_DCMI
= 78¶ DCMI.
-
NVIC_CRYP
= 79¶ Cryptographic processor.
-
NVIC_HASH_RNG
= 80¶ Hash and random number generation.
-
NVIC_TIMER6
= NVIC_TIMER6_DAC¶ For compatibility with STM32F1.
-
Functions¶
-
void
nvic_init
(uint32 address, uint32 offset)¶ Initialize the NVIC, setting interrupts to a default priority.
-
void
nvic_set_vector_table
(uint32 address, uint32 offset)¶ Set the vector table base address.
For stand-alone products, the vector table base address is normally the start of Flash (0x08000000).
- Parameters
address
-Vector table base address.
offset
-Offset from address. Some restrictions apply to the use of nonzero offsets; see the ARM Cortex M3 Technical Reference Manual.
-
void
nvic_irq_set_priority
(nvic_irq_num irqn, uint8 priority)¶ Set interrupt priority for an interrupt line.
Note: The STM32 only implements 4 bits of priority, ignoring the lower 4 bits. This means there are only 16 levels of priority. Bits[3:0] read as zero and ignore writes.
- Parameters
irqn
-device to set
priority
-Priority to set, 0 being highest priority and 15 being lowest.
Warning
doxygenfunction: Cannot find function “nvic_globalirq_enable” in doxygen xml output for project “project0” from directory: /home/docs/checkouts/readthedocs.org/user_builds/librambutan/checkouts/latest/docs/../doxygen/xml
Warning
doxygenfunction: Cannot find function “nvic_globalirq_disable” in doxygen xml output for project “project0” from directory: /home/docs/checkouts/readthedocs.org/user_builds/librambutan/checkouts/latest/docs/../doxygen/xml
-
static void
nvic_irq_enable
(nvic_irq_num irq_num)¶ Enable interrupt irq_num.
- Parameters
irq_num
-Interrupt to enable
-
static void
nvic_irq_disable
(nvic_irq_num irq_num)¶ Disable interrupt irq_num.
- Parameters
irq_num
-Interrupt to disable
-
static void
stm32f1::
nvic_irq_disable_all
(void)¶
-
void
nvic_sys_reset
()¶ Force a system reset.
Resets all major system components, excluding debug.
Register Maps¶
Since the NVIC is part of the ARM core, its registers and base pointer are common across all targes.
-
NVIC_BASE
¶ NVIC register map base pointer.
-
struct
nvic_reg_map
¶ NVIC register map type.
Register Bit Definitions¶
None at this time.